1. Field of the Invention
The present invention relates to semiconductor chip packages. Particularly, the present invention is related to a semiconductor chip package with a package substrate and a lid cover.
2. Description of the Related Art
Surface mount technology (SMT), where semiconductor chips with their connection pads at the bottom surface of the chips are mounted directly onto a surface without being plugged into it, is widely used in electronic applications. Another known semiconductor chip mounting technique is referred to as the Flip-Chip mounting technique. Using this technique, a semiconductor chip having a bottom bond pad pattern is mounted with its face down directly onto a corresponding bond pad pattern of a circuit board in a manner similar to the SMT process.
Semiconductor packages are used for protecting a semiconductor chip or die in a package body, and for providing connection points for connecting the packaged chip or die to the semiconductor chip or die to external devices. To cope with the high density and high pin-count of semiconductor chips, BGA (Ball Grid Array) and PGA (Pin Grid Array) packages have been developed.
In a typical BGA package, the semiconductor chip is mounted to the top surface of a package substrate or printed circuit board-type substrate. The chip is wire bonded to electrical traces in the substrate, then over-molded with an encapsulating material for protection. Solder balls are bonded to the electrical traces on the bottom surface of the substrate, serving as the external electrodes for mounting on a printed circuit board. Again, this type of package is suitable to be mounted using the Flip-Chip or SMT technique. Other BGA type semiconductor chip packages are known where the semiconductor chip is connected to a bottom ball pad pattern through gold wires connected to an internal wiring leading through a multi-layer substrate.
Disadvanges are associated with the prior BGA packages. One disadvantage is that the chips are subject to damages because their top surfaces are exposed during testing or packaging steps. Another disadvantage is that the prior BGA packages require wires for connection between the chip and substrate.